Magnetic random access memory (MRAM) that incorporates a magnetic tunneling junction (MTJ) as a memory storage cell is a strong candidate to provide a high density, fast (1-30 ns read/write speed), and non-volatile storage solution for future memory applications. An MRAM array is generally comprised of an array of parallel first conductive lines on a horizontal plane, an array of parallel second conductive lines on a second horizontal plane spaced above and formed in a direction perpendicular to the first conductive lines, and an MTJ formed at each location where a second conductive line crosses over a first conductive line. A first conductive line may be a word line while a second conductive line is a bit line or vice versa.
Referring to FIG. 1, a conventional MRAM structure 1 is shown in which an MTJ 11 is formed between a first conductive line 10 and a second conductive line 12. In this example, the first conductive line is a word line and the second conductive line is a bit line although the terms are interchangeable. A conductive line may also be referred to as a digit line, row line, data line or column line. The word line 10 and bit line 12 are used for writing data into the MTJ 11. The MTJ consists of a stack of layers with a configuration in which two ferromagnetic layers are separated by a thin non-magnetic insulating layer such as Al2O3, AINX, or MgO which is called a tunnel barrier layer. In a so-called bottom spin valve configuration, the bottom portion 13 is a composite layer with a lower seed layer, a middle anti-ferromagnetic (AFM) layer, and an upper pinned layer (first ferromagnetic layer). The AFM layer is exchange coupled to the pinned layer and thereby fixes the magnetization (magnetic moment) direction of the pinned layer in a preset direction. Above the pinned layer is the tunnel barrier layer 14. The second ferromagnetic layer is a free layer 15 on the tunnel barrier layer and has a magnetization direction that can be changed by external magnetic fields. To maintain data against erasure or thermal agitation, an in-plane uni-axial magnetic anisotropy is needed for the free layer 15. The top layer in the MTJ 11 is generally a cap layer 16.
During a write operation, an electrical current I1 in bit line 12 and a current I2 in word line 10 yield two magnetic fields on the free layer 15. The magnetic fields conform to a right hand rule so that a first field is generated along a first axis (easy axis) in the plane of the free layer and a second field is produced in a direction orthogonal to the first axis and along a hard axis in the free layer. In response to the magnetic fields generated by currents I1 and I2, the magnetic vector in the free layer is oriented in a particular stable direction that represents a memory state. The resulting magnetic vector orientation depends on the direction and magnitude of I1 and I2 and the properties and shape of the free layer 15. Generally, writing a zero “0” requires the direction of either I1 or I2 to be different than when writing a one “1”. Thus, the magnetization direction of the free layer may be switched from a “+x” to a “−x” direction, for example, that corresponds to a change in the memory state from a “0” to a “1” or vice versa.
The magnitude of the magnetic field used to switch the magnetic vector is proportional to the magnitude of I1 and I2 which is on the order of several milli-Amperes for most designs. As the size of MTJs shrinks to 0.1 micron or smaller, the switching fields are expected to become larger and switch transistors will demand a larger amount of chip area. It is desirable to reduce power consumption and this adjustment is achieved in some cases by increasing the field per current ratio of the conductor. A prior art method for increasing the field per current ratio is to provide a magnetic liner or cladding layer on one or more sides of a conductive line. Examples of cladding layers are described by Naji et al. in “A low power 1 Mbit MRAM based on ITIMTJ bit cell integrated with Copper Interconnects”, VLSI Conf. (2002).
The typical writing scheme is a “half select” scheme where a bit line and word line each generates half the required write field for switching the selected MTJ cell. However, the energized word and bit lines reduce the magnetic reversal energy barrier in the other cells along their respective word and bit lines. This condition makes these “half-selected” cells more susceptible to having their magnetic states unintentionally switched when the selected cell is written.
An MRAM with a MTJ cell structure and switching mechanism that does not suffer from the half select problem of the conventional MRAM has been proposed by Motorola. This “Savtchenko” cell structure and switching mechanism are described in U.S. Pat. No. 6,545,906 and by M. Durlam et al. in “A 0.18 micron 4 Mb Toggling MRAM”, IEDM Technical Digest 2003, Session 34, paper #6. In this type of MRAM, the MTJ cell's ferromagnetic free layer is a synthetic anti-ferromagnet (SAF) that may be a multilayer of two ferromagnetic sub-layers of nearly identical magnetic moment, separated by an anti-ferromagnetic coupling layer that maintains an anti-parallel alignment of the moments of the two sublayers. In a SAF free layer, the sublayer which directly contacts the MTJ tunnel barrier layer is the sensing layer. The pinned layer on the opposite side of the barrier layer is the reference layer. When the sensing layer and pinned layer magnetization directions are parallel, the MTJ cell has low resistance, and when the magnetization directions are anti-parallel, the cell has a high resistance.
The Savtchenko type of MRAM uses two orthogonal writing or programming lines, but with the MTJ cell's axis aligned 45 degrees to each of the lines. The SAF free layer responds to the applied magnetic fields differently than a conventional single ferromagnetic free layer. Writing occurs by a process called “toggle” writing in which a two phase programming pulse sequence incrementally rotates the SAF free layer moment or magnetization direction 180 degrees so the MRAM is sometimes called a “toggling” MRAM and the memory cell a “toggle” cell. Because of the cell's 45 degree angle to the programming lines and its field response, the field from a single programming line cannot switch the magnetization of a half selected cell and thereby results in an MRAM with enhanced cell selectivity.
In U.S. Patent Publication No. 2005/0153063, the SAF free layer has weakly coupled regions formed in the anti-ferromagnetic coupling layer by a treatment such as annealing, layering of the anti-ferromagnetic coupling layer, or forming the anti-ferromagnetic coupling layer over a roughened surface of a ferromagnetic layer. Without significant reduction of the saturation field, the weakly coupled regions lower the spin flop field of the SAF free layer in comparison to an untreated SAF free layer. The SAF flop is used during the write operation of a toggle MTJ cell design and its reduction results in lower power consumption during write operations and correspondingly increased device performance.
An alternative method to reduce the write field is to use a multilayer synthetic anti-ferromagnet as described by Y. Fukumoto et al. in “Enhancement of writing margin for low switching toggle MRAMs using multilayer synthetic anti-ferromagnetic structures”, Paper FB-07, 50th MMM Meeting, San Jose, Calif. (2005). In this approach, multiple magnetic layers are coupled in an anti-parallel configuration and a weak anti-ferromagnetic coupling field is used to lower spin flop writing field while maintaining a high saturation field. However, weak anti-ferromagnetic coupling as applied here in either local regions or the full film is very difficult to control during MTJ film depositions and thereby causes a manufacturability issue.
The conventional toggling writing process always changes the selected cell, independent of the sensing layer magnetization direction since the two magnetic sub-layers in the SAF are symmetrical. The toggling MRAM is a “read before write” MRAM which means all the toggle memory cells have to be read first to find their magnetic states and determine whether toggling writing is needed. This “read before write” scheme significantly reduces the write cycle time.
It is desirable to further improve the performance of the toggle MTJ cell by reducing the write current and thereby increasing the field per current ratio. A smaller and more uniform spin-flop field is needed to lower the power consumption of a toggle cell and make toggle MRAM more competitive with DRAM, SRAM, and FLASH memory chips. Moreover, a process that can be reproduced easily in manufacturing is needed to improve control of the toggle MRAM structure.